1. Field of the Invention
The invention relates to direct memory access (DMA) controllers used in computer systems, and more particularly to a DMA controller which can be controlled by both a host processor in the computer system and a local processor performing input/output control operations.
2. Description of the Related Art
Modern computer systems are becoming ever more powerful. One way this power is being increased is by the use of multiple processors performing different functions. The most common case is the use of a host processor to perform the primary functions and local processors performing input/output (I/O) control and management functions. The host processor then has less processing to perform as more activities are performed by the local processors. By splitting up responsibilities in this fashion, overall system capabilities can increase.
However, certain problems can remain. For example, data must still be passed between the main memory used by the host processor and local memory used by the local processor. While this transfer can be somewhat simplified by the use of a direct memory access (DMA) controller in the host portion of the computer system, this still leaves problems of transferring the data in the local I/O unit. Conventionally this has required that the host processor control and program both the host DMA controller and any hardware used on the local I/O unit or that the local processor in the I/O unit obtain each data word being transferred. This greatly limits the flexibility of task sharing between the two processors, limiting performance improvements. Conventionally performance of the local processor is reduced due to the requirements of message passing or by waiting for the host processor to complete many operations and any data transfer processing. Therefore it is desirable to improve the control aspects of transferring the data inside the local I/O unit, particularly without extensive processor action.
Further, quite often the data sizes of the host computer and local I/O unit are different. For example, the host computer may utilize 16 bit words but the local processor may use 24 bit words. Further, in certain cases both units may operate with various differing width data. All of these options require that some data realignment and padding occur. Conventionally the data realignment and padding has been performed by one of the processors. This greatly decreases system performance because so much time is spent just properly organizing the data prior to its use. Therefore it is clearly desirable to automatically handle the data alignment between various alternatives and to provide proper padding at the same time, thus relieving the processors of this time consuming task.